Document History

Date
Version
Author
Description of Revisions
03-01-2014
0.1
E Srikanth
Initial Draft





Acknowledgement:

Thanks to Rob Armstrong for the core code contributions

1. Description


The ZC702 board uses power regulators and a PMBus compliant system controller from Texas Instruments to supply core and auxiliary voltages to the Zynq 7000 APSoC.The voltage and currents to Zynq 7000 can be measured by the Texas Instruments digital power controllers (UCD9248) available on the ZC702 board. The Zynq7000 uses PMBus protocol to communicate with the power controllers over I2C bus connected to the I2C interface of the Zynq Processing system.

This tech tip shall demonstrate how to access the TI Power Controllers and measure the power consumed by the ZC702 board using a standalone application. Description of the Zynq-7000 AP SoC power domains and the power distribution on the ZC702 has been explained in detail in “Measuring ZC702 Power using TI Fusion Power designer” techtip.

The C source files for running this techtip can be downloaded from the following link: Zynq7000AP_SoC_ZC702_pwr_monitor_design.zip

2. Implementation

Implementation Details
Design Type
PL
SW Type
Standalone
CPUs
1 ARM Cortex-A9 666MHZ
PS Features
  • DDR3 533 MHZ
  • Cache
L1 and L2 Cache
PL Features
AXI-GPIO & AXI-BRAM Controller
Boards/Tools
ZC702
Xilinx Tools Version
Vivado 2013.3
Files Provided
Zynq7000AP_SoC_ZC702_pwr_monitor_design.zip
See Appendix B for the descriptions of the files

3. ZC702 Power Distribution


The ZC702 board uses power regulators and a PMBus compliant system controller from Texas Instruments to supply core and auxiliary voltages. The ZC702/706 board uses 12 V Input supply to power the board. There are 5 switching regulators (PTD08D210W) and 1 linear regulator which generate different voltages required for the Zynq700 APSoC as well as the on-board components present on the ZC702/706 board. The voltage output of these regulators are monitored and controlled by three TI power controllers (UCD9248PFC). The power distribution diagram for ZC702 board is as shown in Figure 2.
ZC702 Power Distribution.PNG
Figure 1. ZC702 Power distribution

The three onboard TI power controllers are wired to the same PMBus and can be accessed via TI Semiconductor PCA9548 1-to-8 channel I2C bus switch (U44) from the I2C interface of the Zynq 7000 AP SoC. The bus switch can operate at speeds up to 400 kHz. The I2C multiplexer switch address is 0x74 (0b01110100) and must be addressed and configured to select the desired downstream device. The PMBus of the PM bus controller (UCD9248) has been connected to Channel 7 of the I2C bus switch as shown below in the following figure.

iicbus connection on zc702 board.PNG
Figure 2. I2C Bus Multiplexer Connections on ZC702

The UCD9248 is compliant with the PMBus Specification 1.1 .The PMBus is a serial interface specifically designed to support power management. It is based on the SMBus interface that is built on the I2C physical specification. The UCD9248 supports revision 1.1 of the PMBus standard. Wherever possible, standard PMBus commands are used to support the function of the device. These commands are defined in the UCD92xx PMBUS Command Reference, in accordance with the Compliance section of the PMBus specificationThe UCD9248 provides output voltage and current parameters in Linear format defined in Section 7.3.1 of the PMBus specification.

The linear format uses a 16-bit unsigned mantissa for each parameter, along with an exponent that is shared by all the voltage or current related parameters. The exponent is reported in the bottom 5 bits of the parameter. In the UCD9248, this exponent is a read-only parameter whose value is fixed at –12. This allows setting voltage-related variables over a range from 0 to 15.9997V, with a resolution of 0.244mV.The voltage value is calculated using the equation

Voltage = V × 2^X,

Where Voltage is the parameter of interest, in volts, V is a 12-bit unsigned binary integer mantissa, and X is the signed 5-bit twos-complement binary integer exponent from VOUT_MODE register.

For current parameter, the UCD9248 supports the Linear Data Format described in section 6.1 of the PMBus specification. This linear format is a two-byte value that contains an 11-bit, twos-complement mantissa and a 5-bit, twos-complement exponent.
The relationship between the IOUT_MODE parameter and the Current value is given by the formula:

Current = Y × 2^X,

Where “Current” is the real world value, Y is an 11-bit signed 2s-complement binary integer mantissa, and X is the signed 5-bit twos-complement binary integer exponent of the IOUT_MODE register.

Documentation describing PMBUS programming for the UCD9248 digital power controller is available at TI page www.ti.com/fusiondocs.

Please refer to the ZC702 or ZC706 Evaluation board user guide and schematics for information on the connections and the part numbers used on the ZC702 or ZC706 board.

4. Hardware design


The current hardware design uses the ZC702 hardware preset with an AXI GPIO IP in PL and AXI BRAM. This was done to program the PL with some logic and measure the PL power.
The Zynq IPI block design for power measurement is as shown below.
Design Connections.PNG
Figure 3: Zynq IPI Block Design


5. Software Details


The current standalone application is built based on the PM bus drivers available with Zynq AMS TRD. The PMBus driver “pmbus_iic.c” initializes the I2C controller, setup the I2C bus switch at addresses 0x74, and provides all the required functions to monitor and program the TI power controller over PM bus.
The linear11ToFloat function in the pmbus_iic.c file will convert the IOUT_MODE register of the UCD9248 digital power controller to real world current value. The Power Monitor Application reads the voltage and current information of the power supply regulators monitored by the UCD9248 Power controllers, calculates the average power of individual supply and finally calculates the total power consumed by the ZC702 board. These values are updated for every 1 second.


6. Step by Step Instructions


6.1. ZC702 Board Setup


  1. Connect the board to the power cable
  2. Connect a Xilinx Platform cable USB II cable or digilent cable between the Windows Host machine and the Target board with the following details, based on your cable type.
CableType
Bit1
Bit2
XilinxPlatformCableUSBII
1
0
DigilentCable
0
1
  1. Connect a Xilinx Platform cable USB II cable between the Windows Host machine and the Target board.
  2. Connect a USB cable to connector J21 on the target board with the Windows Host machine. This is used for USB to serial transfer.
  3. Power on the ZC702 board
IMPORTANT: Ensure that all the switch settings on SW11 as set to off position.


6.2. Generating the Hardware Design

  1. Copy the Zynq7000AP_SoC_ZC702_pwr_monitor_design.zip file to your hard drive and unzip the file to C drive.
  2. Open the Vivado GUI.
  3. Select Open Project to open the existing project
  4. Browse to the C:\ Zynq7000AP_SoC_ZC702_pwr_monitor_design\zynq_pwr_dsgn” folder where the vivado project is present
  5. Select the zynq_pwr_dsgn.xpr file and select ok.
  6. The Vivado tool should show the project open.
  7. In the Source View under Design Sources, expand the zynq_platform_wrapper.v file.
    Design Hierarchy.png
    Figure 4. Design Hierarchy
  8. Double click on the zynq_plaform.bd file to open the Zynq Block design. And check the interconnectivity as shown below
  9. In the Flow Navigator under Program and Debug, select the Genarate Bitstream button.
    Generating the bitstream.PNG
    Figure 5. Generating Bitstream
  10. The Vivado tool will prompt that synthesis and implementation results are not available and would ask to run the synthesis and implementation process.
  11. Click Yes and vivado tool would run the Synthesis and implementation process and finally generate the bitstream
  12. After the bitstream is generated. Select View report in Bitstream generated successfully dialog box and click OK.
  13. In the Vivado tool, select File Export Export Hardware design to SDK.
    Exporting Hardware to SDK.PNG
    Figure 6. Exporting Hardware to SDK
  14. Ensure that Export Hardware, Include bitstream and Launch SDK options are checked and click ok.
  15. The Vivado tool will export the hardware and bitstream to SDK and finally SDK tool is launched.

6.3. Running the Software


  1. After the SDK tool is launched, Create a new application project.Select File > New > Application Project.The New Project wizard opens
  2. Use the information in the table below to make your selections in the wizard screens.
WizardScreen
SystemProperty
SettingorCommandtoUse
ApplicationProject
ProjectName
zynq_power_app
UseDefaultLocation
Selectthisoption
HardwarePlatform
hw_platform_0
Processor
PS7_cortexa9_0
OSPlatform
Standalone
Language
C
BoardSupportPackage
Select CreateNew and providethenameof zynq_power_app_bsp
Templates
AvailableTemplates
EmptyApplication
  1. Click Finish.
  2. The New Project Wizard closes and SDK creates the zynq_power_app project and the zynq_power_app_bsp BSP project under the project explorer. SDK also automatically compiles the project and generates the BSP.
  3. In the Project Explorer tab, expand the zynq_power_app project, right-click the src directory, and select Import to open the Import dialog box.
  4. Expand General in the Import dialog box and select File System.
  5. Click Next.
  6. Add the files present in “C:\ Zynq7000AP_SoC_ZC702_pwr_monitor_design\sw\srcs\” directory and click Finish.
    Importing the sources to the empty project.png
    Figure 7 Importing the sources to the empty project
  7. SDK automatically builds the application and displays the status in the console window
  8. You should see an error during the compilation indicating the that it is unable to determine the pow() function.
  9. This is because the SDK is not able to search the math library in its compilation path.
  10. In the Project Explorer tab, right click on the zynq_power_app project and select C/C++ BUILD Settings.
  11. In the zynq_power_app settings dialog, select Libraries under ARM gcc linker.
  12. Add the math library by selecting the add button in the Libraries section and enter’m’ and click ok.
    setting up the library.PNG
    Figure 8. Adding the math library to the project
  13. Now the SDK builds the application successfully.
  14. Expand the zynq_power_app ->src and open interface.c.
  15. Observe the uart_control function at line number 136.
  16. Under zynq_power_app-->src directory and pmbus_iic.c
  17. Observe the readVoltage_real and readCurrent_real function at line number 226.
  18. After reviewing the code, close the file.
  19. Select Xilinx Tools --> Program FPGA.
    Programming the Zynq PL with bitstream.png
    Figure 9.Programming the Zynq PL with bitstream
    Figure 8 : Programming the Zynq PL with bitstream
  20. Click on Program to download the bitstream to the ZC702 board.
  21. Open a Serial Terminal (Like Hyperterminal or Teraterm) configured at following settings
    * Baudrate: 115200
    * No of bits: 8
    * Parity : 1
    * Flow Control : NONE
  22. In the Project explorer view of the SDK tool, Right click “zynq_power_app” folder and select Run As  Run Configurations. This will launch the Run Configurations dialog.
  23. In the run configurations dialog , double click on Xilinx C/C++ ELF option to create a new configuration as shown below.
    Creating a New Run Configuration.png
    Figure 10. Creating a New Run Configuration
  24. Select the zynq_power_app Debug configuration and click on Run.
  25. Observe the message in the Serial console to view the Voltage , current and average power consumed by each of the power supply on Zc702 board.
    Power Monitor APP Test Results1.PNG
    Figure 11. Power Monitor APP Test Results

6.4. Power Monitor Result Details.


The Power Monitor Application reads the voltage and current information of the power supply regulators monitored by the UCD9248 Power controllers as described in the list given below.
This excludes the 5V power rail which powers the USB Controllers available on the ZC702 board.The Power Monitor Application calculates the average power of individual supply and finally calculates the total power consumed by the ZC702 board. These values are updated every 1 second.

Device
Rail
Net Name
Vout
Regulator monitored
Description
UCD9248@52D
1
VCCINT
1.0V
PTD08D210W(U17) VoutA
1.0V nominal supply of Zynq 7000 that powers all of the PL internal logic circuits.
UCD9248@52D
2
VCCPINT
1.0V
PTD08D210W(U17) VoutB
1.0V nominal supply that powers all of the PS internal logic circuits.
UCD9248@52D
3
VCCAUX
1.8V
PTD08D210W(U18) VoutA
1.8V nominal supply that powers all of the PL auxiliary circuits.
UCD9248@52D
4
VCCPAUX
1.8V
PTD08D210W(U18) VoutB
1.8V nominal supply that powers all of the PS auxiliary circuits.
UCD9248@53D
1
VCCADJ
2.5V
PTD08D210W(U19) VoutA
Supplies power to the VCCADJ power net on the ZC702 board. The list of components powered by VCCADJ net apart from the Zynq 7000 on ZC702 board is listed in the Appendix A: List of Components using the ZC702 power supplies section.
UCD9248@53D
2
VCC1V5PS
1.5V
PTD08D210W(U19) VoutB
Supplies power to the VCCO_DDR power domain of the Zynq 7000 as well as the 4 Micron DDR3 (MT41J256M8HX-15E) components on the ZC702 board. This is a 1.5V nominal supply that supplies the DDR I/O bank input, output drivers and termination circuitry.
UCD9248@53D
3
VCC_MIO
1.8V
PTD08D210W(U20) VoutA
Supplies power to the VCC_MIO power net on the ZC702 board.VCC_MIO supplies power to PS_MIO power domain of the 1.8V nominal supply that supplies power to the PS_MIO [53:0], PS_CLK, and PS_POR_B I/Os banks of Zynq 7000 as well few components on the ZC702 boards.The list of components that are powered by VCC_MIO supply apart from the Zynq 7000 on ZC702 board is listed in the Appendix: List of Components using the ZC702 power supplies section.
UCD9248@53D
4
VCCBRAM
1.0V
PTD08D210W(U20) VoutB
Supplies power to VCC_BRAM power domain of Zynq7000. VCC_BRAM is a 1.0V nominal supply that supplies power to all the Block RAMs available in the Zynq Programmable Logic.
UCD9248@53D
1
VCC3V3
3.3V
PTD08D210W(U21) VoutA
The VCC3V3 supplies 3.3v power to the components available on the board which also includes the UCD9248 power controller itself. The list of components that are powered by VCC3V3 on ZC702 board is listed in the Appendix A: List of Components using the ZC702 power supplies section.
UCD9248@53D
2
VCC2V5
2.5V
PTD08D210W(U21) VoutB
The VCC2V5 supplies 2.5v power to few PL IO banks as well as the components available on the board. The list of components that are powered by VCC2V5 on ZC702 board is listed in the Appendix A: List of Components using the ZC702 power supplies section.

7. Conclusion:

This tech tip has provided you with the required standalone drivers to monitor the power of the ZC702 using the UCD9248 PM bus controllers available on the ZC702 board.The tech tip has provided the required function to perform the linear conversion of voltage and current values read from the PM Bus controller registers.

8. Appendix A: List of Components using the ZC702 power supplies.

The list of components powered by different power regulators on the ZC702 board is described in detail in the Appendix A: List of Components using the ZC702 power supplies section in the
Measuring ZC702 Power using TI Fusion Power Designer Tech Tip.

9. Appendix B: File Descriptions


  • Zynq7000AP_SoC_ZC702_pwr_monitor_design\zynq_pwr_dsgn: Vivado Design Project directory: Contains the supported design files for the tech tip.
  • Zynq7000AP_SoC_ZC702_pwr_monitor_design\sw\srcs: Contains Source files for the SDK project.