Zynq UltraScale+ MPSoC Power Advantage Tool 2017.3
[Preliminary]

This page provides an introduction to the Power Advantage Tool, as well as links to how to build various components of the Power Advantage Tool and how to make them run on a supported Xilinx Evaluation Board (e.g. ZCU102). The Evaluation Board is based on a Zynq UltraScale+ MPSoC device (see table below). For additional information, refer to Zynq UltraScale+ MPSoC: ZCU102 Evaluation Kit – Preliminary ZCU102 Getting Started Document.

Supported Evaluation Boards:
Board
Processor
ZCU102
XCZU9EG

1 Revision History


This wiki page complements the 2017.1 version of Xilinx Vivado and SDK. For other versions, refer to the Wiki Technical Articles page Tech Tips.

Change Log:
  • Update all projects, IPs, and tools versions to 2017.3
  • FPD Off APU Suspend to RAM (Release)
  • Power Down PL from APU Linux
  • Various fixes and clean-up



2 Overview


The Power Advantage Tool is a demo designed to showcase the power features of the Zynq UltraScale+ MPSoC device.
The Power Advantage Tool consists of four main elements: The Qt PC Windows GUI, the MSP430 Controller code, Zynq UltraScale+ MPSoC R5 code, and the Programmable Logic (PL) design.
(1) The Qt PC GUI provides the user interface for the Power Advantage Tool. The PC communicates to the MSP430, a low-power processor, whose job it is to stay on during the lowest power states of the Zynq UltraScale+ MPSoC, including when the Zynq device is being turned off.
(2) The MSP430 controls the Evaluation Kit Power Monitoring IC’s (INA226’s) and Power Management IC’s (PMICs), as well as communicates with the Zynq UltraScale+ R5.
(3) The R5 is the lowest-power ARM processor on the Zynq UltraScale+ MPSoC, and is on during the lowest power running states. The R5 communicates with the Power Management Unit (PMU) to set the power states, as well as selects the PL Options via GPIO.
(4) The PL contains the Hardware Design.
For additional information, please refer to Power Advantage Tool Theory of Operation.pdf
Power Tool Block Diagram.png
Figure 1. Power Advantage Tool Block Diagram.



3 Software Tools and System Requirements


3.1 Hardware


Required:
  • ZCU102 evaluation board and power supply
    • rev 1.0 with ES2 silicon or
    • rev 1.0 with production silicon or
    • rev D2 with production silicon
  • 4K Monitor with DisplayPort (see Xilinx recommended list)
  • Display Port cable (DP certified)
  • Windows PC with about 40GB free
  • Internet access
  • USB 3.0 Micro-B adapter
  • USB keyboard and mouse
  • USB 3.0 hub
  • 16GB (non-Class 10) SD Card (see Xilinx recommended list) Note: Other than Class 10 is recommended for 2017.1 and 2017.2 builds (e.g. Class 4).
  • Cables: Ethernet, DP, (2) Micro USB.
  • TI MSP-FET (for MSP430 programming)

Note: Boards marked Revision 1.0 or higher come with the MSP430 pre-programmed, and thus the TI cable and TI Code Composer are not required for pre-built image use. Note: The exception is MSP430 version May 17th 2017, which is incompatible.

Optional:
  • Linux PC for building PetaLinux

3.2 Software


Required:
  • Xilinx VIvado and SDK for all tool flow tutorials (see UG1144 for detailed OS requirements)
  • Git distributed version control system

Optional:

3.3 Licensing


  • Important: Certain material is separately licensed by third parties and may be subject to the GNU General Public License version 2, the GNU Lesser General License version 2.1, or other licenses.
  • You will need a Vivado License with Vivado System Edition, UltraScale Plus Family with Bitgen (for SD, PL, R5) to build the designs.



4 Power Advantage Tool Sources

This section shows how to get and install the Power Advantage Tool Sources. This will be needed for any steps that are Building from Sources.

4.1 Download the Power Advantage Tool Sources

An archive with the Power Advantage Tool Sources files zynqus_<Description>_pwr_<Board>_<Datecode>.zip (e.g. zynqus_ubuntu_pwr_20161005.zip) can be downloaded below (requires sign up).
zynqus_pwr_20170728.zip
2017.3 ZCU102 Download

4.2 Power Advantage Tool Sources Contents

After you have downloaded the Power Advantage Tool Sources package, extract its contents to C:

20161012 Zynqus Pwr Directory.png
Figure 2. Power Advantage Tool Sources Directory.

5 Links


Zynq UltraScale+ MPSoC Power Advantage Tool:

Other References:



6 Other Information


6.1 Known Issues


  • None

6.2 Limitations


  • Class 10 SD Card not supported (e.g. Class 4 should be fine)
  • Not all models of 4K DP Monitors have been tested (please see Xilinx recommended list)



7 Support


To obtain technical support for this reference design, go to the:
  • Xilinx Answers Database to locate answers to known issues
  • Xilinx Community Forums to ask questions or discuss technical details and issues. Please make sure to browse the existing topics first before filing a new topic. If you do file a new topic, make sure it is filed in the sub-forum that best describes your issue or question e.g. Embedded Linux for any Linux related questions. Please include "ZCU102 Power Advantage Tool" and the release version in the topic name along with a brief summary of the issue.

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