Introduction

The Linux MIPI DSI2 Tx Subsystem driver (xlnx_dsi.c) is part of the Xilinx DRM KMS framework, and provides the encoder and connector functionality.

IP / Driver Features

IP Features	2017.1 - 2019.1	2019.2 and above
IP Version	2.0	2.0
Support 1 to 4 Lanes	Yes	Yes
Input Pixels per clock 1 / 2 / 4	Yes	Yes
DSI Data Types RGB888, RGB565, RGB666 L, RGB666 P, Compressed	Supports all except Compressed (DRM framework limitation)	Supports all except Compressed (DRM framework limitation)
Interrupt generation to indicate subsystem status information	No	No
DCS(Display Command Set) command mode	No	Yes

Other supported features

The MIPI DSI-2 Tx Subsystem driver supports the following features -

Enable/Disable EoTp Generation
Send blanking packet/use LP mode for BLLP periods
Blanking packet type for BLLP region
Blanking Packet/Null Packet
Video mode transmission sequence
BLLP duration of VACT region packet
payload size in bytes(WC). Applicable only Burst mode
Write short packets with different data types to control the Panel. Refer Xilinx PG238.

Unsupported Features

Reading the DSI panel parameters from EDID
No interrupts are supported.

Kernel Configuration

CONFIG_DRM_XLNX_DSI should be enabled. This depends on CONFIG_DRM_XLNX and CONFIG_DRM

CONFIG_DRM_PANEL_SIMPLE needs to be enabled in the kernel config.

Device tree binding

The dts node should be defined with correct hardware configuration. How to define the node is documented here, xlnx,dsi.txt

Test Procedure

The IP has been tested for 1920x1200 RGB888 4 Lanes 2 pixels per clock along with Frame buffer Read and Video Mixer IP.

root@xilinx-zcu102-2019_1:~# modetest -M xlnx
Encoders:
id      crtc    type    possible crtcs  possible clones
30      29      DSI     0x00000001      0x00000000

Connectors:
id      encoder status          name            size (mm)       modes   encoders
31      30      connected       DSI-1           108x272         1       30
  modes: name refresh (Hz) hdisp hss hse htot vdisp vss vse vtot)
  1920x1200 60 1920 2105 2105 3030 1200 1203 1208 1212 154500 flags: ; type: preferred, driver
  props:
        1 EDID:
                flags: immutable blob
                blobs:

                value:
        2 DPMS:
                flags: enum
                enums: On=0 Standby=1 Suspend=2 Off=3
                value: 0
        5 link-status:
                flags: enum
                enums: Good=0 Bad=1
                value: 0
        6 non-desktop:
                flags: immutable range
                values: 0 1
                value: 0
        19 CRTC_ID:
                flags: object
                value: 29
        32 eotp:
                flags: range
                values: 0 1
                value: 0
        33 video_mode:
                flags: range
                values: 0 2
                value: 0
        36 bllp_burst_time:
                flags: range
                values: 0 65535
                value: 0
        34 bllp_mode:
                flags: range
                values: 0 1
                value: 0
        35 bllp_type:
                flags: range
                values: 0 1
                value: 0
        37 cmd_queue:
                flags: range
                values: 0 16777215
                value: 0
        38 height_out:
                flags: range
                values: 2 4096
                value: 0
        39 width_out:
                flags: range
                values: 2 4096
                value: 0
        40 in_fmt:
                flags: range
                values: 0 16384
                value: 0
        41 out_fmt:
                flags: range
                values: 0 16384
                value: 0

CRTCs:
id      fb      pos     size
29      44      (0,0)   (1920x1200)
  1920x1200 60 1920 2105 2105 3030 1200 1203 1208 1212 154500 flags: ; type: preferred, driver
  props:
        20 ACTIVE:
                flags: range
                values: 0 1
                value: 1
        21 MODE_ID:
                flags: blob
                blobs:

                value:
                        845b0200800739083908d60b0000b004
                        b304b804bc0400003c00000000000000
                        48000000313932307831323030000000
                        00000000000000000000000000000000
                        00000000
        18 OUT_FENCE_PTR:
                flags: range
                values: 0 18446744073709551615
                value: 0

Planes:
id      crtc    fb      CRTC x,y        x,y     gamma size      possible crtcs
28      29      44      0,0             0,0     0               0x00000001
  formats: XB24 XR24 BG24 RG24
  props:
        7 type:
                flags: immutable enum
                enums: Overlay=0 Primary=1 Cursor=2
                value: 1
        16 FB_ID:
                flags: object
                value: 44
        17 IN_FENCE_FD:
                flags: signed range
                values: -1 2147483647
                value: -1
        19 CRTC_ID:
                flags: object
                value: 29
        12 CRTC_X:
                flags: signed range
                values: -2147483648 2147483647
                value: 0
        13 CRTC_Y:
                flags: signed range
                values: -2147483648 2147483647
                value: 0
        14 CRTC_W:
                flags: range
                values: 0 2147483647
                value: 1920
        15 CRTC_H:
                flags: range
                values: 0 2147483647
                value: 1200
        8 SRC_X:
                flags: range
                values: 0 4294967295
                value: 0
        9 SRC_Y:
                flags: range
                values: 0 4294967295
                value: 0
        10 SRC_W:
                flags: range
                values: 0 4294967295
                value: 125829120
        11 SRC_H:
                flags: range
                values: 0 4294967295
                value: 78643200

Frame buffers:
id      size    pitch

root@xilinx-zcu102-2019_1:~#
root@xilinx-zcu102-2019_1:~# modetest -M xlnx -s 31:1920x1200@BG24 -w 31:video_mode:1
setting mode 1920x1200-60Hz@BG24 on connectors 31, crtc 29

root@xilinx-zcu102-2019_1:~#
root@xilinx-zcu102-2019_1:~# modetest -M xlnx -s 31:1920x1200@RG24 -w 31:video_mode:1
setting mode 1920x1200-60Hz@RG24 on connectors 31, crtc 29

root@xilinx-zcu102-2019_1:~#

Xorg (X11) and Mali GPU

The MIPI DSI-2 Tx Subsystem can be used with Xorg and the Zynq UltraScale+ MPSoC Mali400 GPU.

Since Xorg works with AR24 DRM format (DRM_FORMAT_ARGB8888), please ensure that this is enabled/supported in Video Framebuffer Read / Video_Mixer IP connected.

A user should enable the following packages in the PetaLinux Configuration to enable and test the GPU (Zynq™ UltraScale+™ MPSoC - Graphics Driver Stack - Mali 400) acceleration:

 -> Filesystem Package -> libs -> libmali-xlnx
 -> Filesystem Package -> misc -> xf86-video-armsoc
 -> Filesystem Package -> x11 -> base -> xserver-org -> xserver-xorg-extension-glx
 -> Filesystem Package -> x11 -> mesa-demos

Steps to manually launch Xorg

Xorg &

Xorg clients look for the env variable to find corresponding server. Thus export before running clients from serial console.

export DISPLAY=:0.0

Run OpenGL ES test applications.

es2tri
es2gears_x11

Disable Xorg Timeouts:

The default settings for Xorg may cause the screen to go black after a 10 minute timeout. The user can disable these in their xorg.conf file using the following.

Section "Monitor"
        Identifier      "MIPI"
        Option          "DPMS"                  "false"
EndSection

Section "ServerFlags"
        Option "BlankTime"   "0"
        Option "StandbyTime" "0"
        Option "SuspendTime" "0"
        Option "OffTime"     "0"
EndSection

xset can be used to change some settings. The following can be used to change the power sate and force display on if a timeout occurs.

sleep 1; xset dpms force on  #Sleep adds a delay to help X from getting confused on the order of events
sleep 1; xset dmps force off

Power & Clock Management

There is no power down for the MIPI DSI IP. However the MIPI DSI IP clocks can be controlled using the Common Clock Framework.

Boards Supported

ZCU102 Rev 1.0

Known Issues

AR66769 - MIPI DSI TX Subsystem - Release Notes and Known Issues for the Vivado 2016.1 tool and later versions

Change log

2022.1

no changes

2021.2

no changes

2021.1

no changes

2020.2

Summary
- Added support to Generic long write command
Commits
- d61300 drm: xlnx: dsi: Add Generic long write command support

2020.1

no changes

2019.2

Summary
- Added support to DCS command mode
Commits
- 5f0013 drm: xlnx: dsi: Add command mode support

2019.1

Summary
- Added support for clock framework
- Updated the drm property creation logic
Commits
- 9d61db1 drm: xlnx: dsi: Fix the drm property creation
- 3792d72 drm: xlnx: dsi: Add support for clock framework
- 26a8a4d Merge tag 'v4.19' into master

2018.3

Summary
- Disabling bridge when DSI is disabled
- Fix a kernel panic when "halt" is run
Commits
- 3a1266e drm: xlnx: dsi: Fix kernel panic when "halt" is run
- b3314af drm: xlnx: dsi: Disable bridge instance

2018.2

Summary
- No change

2018.1

Summary
- Added xlnx bridge support
- Initial version based on new xlnx drm framework
  - Driver now moved to different drivers/gpu/drm/xlnx/xlns_dsi.c
  - Older driver drivers/gpu/drm/xilinx/xilinx_drm_dsi.c not supported.
Commits
- a1a9719 drm: xlnx: dsi: Adding xlnx bridge support
- 4d08c57 drm: xlnx: dsi: Adding dsi driver to new framework

2017.4

Summary
- No changes

2017.3

Summary
- Fix the Horizontal Active calculation
- Other minor fixes
Commits
- 3a49cee drm: xilinx: dsi: Fixes the Hact calculation
- 00bf902 drm: xilinx: dsi: Fix for checkpatch
- 33ab072 drm: xilinx: dsi: Don't check unsigned with negative
- 434275c drm: xilinx: dsi: Add static and remove unused variable
- 9db27d0 drm: xilinx: dsi: Add const for constant callback functions
- 9c6f82c drm: xilinx: dsi: Change the documentation style

2017.2

Summary
- No changes

2017.1

Summary
- Initial version of driver added
Commits
- 63b99c0 drm: xilinx: mipi: DRM/KMS driver for MIPI DSI2 Tx subsystem

Xilinx Wiki

Xilinx DRM KMS MIPI DSI2-Tx Driver

Table of Contents