Overview
Xen is a type-1 Hypervisor defined, maintained and provided to the open source community by the Xen Project. Xilinx actively contributes code to the Xen Project to provide Zynq UltraScale+ MPSoC platform support as well as key enhancements which benefit Xilinx customer use-cases.

Xen allows multiple instances of operating system(s) or bare-metal applications to execute on Zynq UltraScale+ MPSoC. Additional information on the Xen hypervisor can be found at the Xen Project Software Overview page.

Xilinx provides within the PetaLinux Tools and also in our Git tree, core elements and example designs to enable usage of Linux + bare-metal system configurations across the processing cores of Zynq UltraScale+ MPSoC. Key components of these example designs are described below in order to assist our customers to configure, build and deploy these basic configurations and to also identify current functionality gaps which may need to be further addressed within the customer's final system architecture.

Xen1_27Mar.JPG
One Linux DomU + two Bare-Metal Applications


Xen2_27Mar.JPG
Linux Dom0 with custom apps + three Bare-Metal Applications


Xen3_27Mar.JPG
Two Linux DomU + one Bare-Metal Application


Xen4_27Mar.JPG
Three Linux DomU


Xen-Based-System Feature Summary

Xilinx provides reference designs which include core capabilities for Xen-based systems. The table below lists important system features and their status under native Linux (no hypervisor), Linux Dom0 (on Xen), and Linux DomU (on Xen).

Features that are not listed, or indicated as "Roadmap" below are not currently supported by Xilinx.

Feature
Native Linux
Linux Dom0
Linux DomU
Notes
Power Management – various functions
Yes
2018.3
2018.3
As of 2017.3, some functionality included in Xen
Not fully featured or tested
See Xen sources
FPGA_manager (write once)
Yes
Yes
Roadmap
See: FPGA Manager
FPGA_manager (write multiple)
2018.1
Target: 2018.1
Roadmap

Partial Reconfiguration
Roadmap
Roadmap
Roadmap

RPU life cycle management
Yes
Roadmap
Roadmap

OpenAMP low-level comms APU/RPU
Yes
2018.1 (libmetal)
2018.1 (libmetal)

OpenAMP RPMsg comms APU/RPU
Yes
Roadmap
Roadmap

Shared device memory DomU to DomU
N/A
2018.1
2018.1
See: Xen Hypervisor Internals
Xen Shared memory
Shared cacheable memory DomU to DomU
N/A
Roadmap
Roadmap

GPU Usage
Yes
Roadmap
Roadmap

PL IP Usage
Yes
Yes under any of the following conditions:
  • Only one PL master IP communicating with guest
  • PL master IPs must use guest-dedicated AXI port(s)
Yes under any of the following conditions:
  • Only one PL master IP communicating with guest
  • PL master IPs must use guest-dedicated AXI port(s)
See: Xen and PL Masters
Additional PL IP planned for 2018.1 should mitigate key challenges.
PCIe Pass-through to DomU
N/A
Roadmap
Roadmap

Warm Reset/Restart
Yes - under explicit use-cases
Roadmap
Roadmap

Linux Application Debug
Yes (via TCF)
Yes (via JTAG)
Yes (via JTAG)
https://www.xilinx.com/html_docs/xilinx2017_3/SDK_Doc/SDK_concepts/concept_xen-aware_debug.html

Build kernel with debug symbols enabled.


Using Xen Hypervisor with Xilinx Releases


2017.3/2017.4

Building the Xen Hypervisor with PetaLinux 2017.3
General information for configuring and Building Linux Dom0
General information for configuring and Building Linux DomU
Building a EL1 baremetal DomU guest with Xilinx SDK

2017.1/2017.2

Building the Xen Hypervisor with PetaLinux 2017.1
General information for configuring and Building Linux Dom0
General information for configuring and Building Linux DomU
Building a EL1 baremetal DomU guest with Xilinx SDK

2016.4

Building the Xen Hypervisor with PetaLinux 2016.4
Buildling the Xen Hypervisor with Xilnx's Yocto Flow

2016.3

Building the Xen Hypervisor with PetaLinux 2016.3


Additional Commercial Support and Professional Services

Xilinx recommends our Premier Partner: DornerWorks to customers seeking support beyond the example designs described above. DornerWorks has worked with customers to solve complex system problems including new OS support, frontend drivers, performance optimization, DMA accesses, and inter-OS communications.


Related Topics

Non-hypervisor AMP Options and Viabiilty: Unsupervised AMP