The U-Boot Secondary Program Loader (SPL) is a generic implementation included in the U-Boot code that can be used to replace the Xilinx First Stage Boot Loader. This boot flow is documented here for completeness and is not supported by Xilinx.

U-Boot SPL cannot be used on ZynqMP devices, as the current PMU firmware relays on a hardware configuration data provided by the FSBL to get knowledge of the platform. As far as the SPL does not handle this configuration data the board bring up cannot be completed successfully. As far as the PMU is a mandatory component for a Linux based target, FSBL flow is required for ZynqMP targets.

Task Dependencies (Pre-requisites)

Tools Required

Input Files Required

  • ps7_init_gpl.[c/h] (Processor Init files from the HDF)

Output Files Produced

  • spl/boot.bin – Boot image binary
  • spl/u-boot-spl.bin – U-Boot SPL binary
  • u-boot.img – U-Boot image loaded by SPL

Task Description

Build U-Boot SPL

The build process is integrated in the normal U-Boot build process, and a can be configured through CONFIG_SPL_BUILD option. Xilinx evaluation board configuration files already have the SPL build enabled by default so it's not required to modify anything to make it build, just follow the common U-Boot build process.

In order to replace the FSBL, U-Boot SPL requires to initialize the processor system using the hardware specific initialization code (ps7_init_gpl). These files are part of the Hardware Description File (HDF) created by the Vivado tool when exporting the design, and needs to be placed in the board folder within U-Boot code. The repository already comes with pre-defined initialization code for Xilinx boards located on board/xilinx/zynq folder.

QSPI mode load configuration is supported through CONFIG_SPL_SPI_LOAD option, and by default Zynq-7000 includes the following configuration (includes/configs/zynq-common.h)
/* qspi mode is working fine */
#define CONFIG_SYS_SPI_U_BOOT_OFFS  0x100000
#define CONFIG_SYS_SPI_ARGS_OFFS 0x200000
#define CONFIG_SYS_SPI_ARGS_SIZE 0x80000

Bitstream configuration is supported through CONFIG_SPL_FPGA_SUPPORT option, and by default Zynq-7000 includes the following configuration (includes/configs/zynq-common.h):
/* FPGA support */
#define CONFIG_SPL_FPGA_LOAD_ADDR      0x1000000
/* #define CONFIG_SPL_FPGA_BIT */
# define CONFIG_SPL_FPGA_LOAD_ARGS_NAME "download.bit"
# define CONFIG_SPL_FPGA_LOAD_ARGS_NAME "fpga.bin"
Note: Bitstream programming by SPL only can be used in SD mode, for QSPI mode bitstream programming have to be done in later stages (U-Boot or Linux)

Boot using U-Boot SPL

SD Card

Place the output files in a SD card and boot in SD mode:
  • boot.bin
  • u-boot.img
  • fgpa.bin or download.bit (Optional)


The QSPI boot consists on programming the boot files at the correct base addresses, where either the BootROM or SPL looks for the files to be loaded.

There are different ways to program the QSPI Flash device. As an example SD card boot mode can be used to program using the following commands from the U-Boot command prompt:
sf probe 0 0 0
fatload mmc 0 0x40000 boot.bin
sf erase 0 <boot.bin size>
sf write 0x40000 0 <boot.bin size>
fatload mmc 0 0x40000 u-boot.img
sf erase 0x100000 <u-boot.img size>
sf write 0x40000 0x80000 <u-boot.img size>

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