Introduction

This page provides details related to the light weight IP (LWIP) library and the SW app lwip echo server.
LWIP141 provides a light weight TCP/IP stack to use with ethernet interfaces. It supports:
-> GEM on Zynq and Zynq Ultrascale+ MPSoC (using emacps driver)
-> AXI ethernet (using axiethernet driver)

How to enable

-> lwip141 library can be found at
https://github.com/Xilinx/embeddedsw/tree/master/ThirdParty/sw_services/lwip141
lwip141
|
- doc - Provides the API and data structure details
|
- src - Driver source files which are further organized into
||
---- contrib/ports/xilinx - Contains the interface specific implementation
||
---- lwip-1.4.1 - Contains the stack implementation

-> lwip_echo_server is an application demonstrating the use of lwip141 library with a basic echo test using telnet. It can be found at
https://github.com/Xilinx/embeddedsw/tree/master/lib/sw_apps/lwip_echo_server

Features supported

1. GEM on Zynq/ZynqMP

Controller/Driver features supported

- All the basic controller features are supported through the controller driver emacps - 10/100/1000 speeds, PHY management, DMA, Packet buffer support, Checksum offload.
- ZynqMP only: 64 bit descriptor support, Priority queue support, Jumbo frame support.

Stack Features

- TCP
- UDP
- DHCP

PHY configurations

lwip echo server supports the following PHY configurations:
Family
PHY
Support
Remarks
Zynq
RGMII
Yes


SGMII in PL
Yes
Refer to AR# 66006

1000BaseX in PL
Yes
Refer to AR# 66006

GMII2RGMII convertor in PL
Yes

ZynqMP
RGMII
Yes


SGMII
No


SGMII in PL
Yes
Refer to xapp1306

1000BaseX in PL
Yes
Refer to xapp1306

GMII2RGMII convertor in PL
Yes



2. AXI Ethernet on Microblaze/Zynq/ZynqMP

Controller/Driver features supported

- Support for MII, GMII, RGMII, SGMII, and 1000BASE-X PHY interfaces
- Support for Check sum offloading.
- Supports AXI DMA + 1G Ethernet Configuration on KC705//KCU105Zynq/ZynqMP Platforms
- Supports AXI FIFO + 1G Ethernet Configuration.

Stack Features

- TCP
- UDP
- DHCP

PHY configurations

lwip echo server supports the following PHY configurations
Family
PHY
Support
Remarks
KC705
GMII
Yes


RGMII
Yes


SGMII
Yes


1000Base-x
Yes

ZYNQ
SGMII
Yes
Refer to AR# 66006

1000Base-X
Yes
Refer to AR# 66006
ZYNQMP
SGMII
Yes


1000Base-x
Yes

Features not supported

There is no support for the following features: (In plan)
- IGMP
- Multicast

Performance

These benchmark performance numbers were obtained by connecting Xilinx boards to Linux PCs/server machines (Ubuntu/Red Hat Enterprise).
The application used is from xapp1026/xapp1306 with optimal settings on the board side. iperf is run on the linux machine.

Zynq

Board: ZC706
CPU Freq: 666MHz (A9)
Link Speed: 1000Mbps, Full duplex

TCP
MTU
Rx (Mbps)
Tx (Mbps)
1500
944
943

ZynqMP

Board: ZCU102
CPU Freq 1100MHz (A53)
Link Speed 1000Mbps, Full duplex
DDR 533MHz
CCU: No
Linux version: 4.6

TCP
MTU
Rx (Mbps)
Tx (Mbps)
1500
918
948

Test cases

lwip echo server is used to test lwip141 library with a basic TCP echo application.
Create an lwip echo server application. Run fsbl and then lwip echo server elf.
On the link partner, run
telnet <ip address> 7

Note: If DHCP is not being used (enabled by default), make sure to set static IP addresses in the same group in lwip echo server and the link partner machine.

Sample expected output:
-----lwIP TCP echo server ------
TCP packets sent to port 6001 will be echoed back
Start PHY autonegotiation
Waiting for PHY to complete autonegotiation.
autonegotiation complete
Waiting for Link to be up;
link speed for phy address 12: 1000
Board IP: 10.10.70.5
Netmask : 255.255.255.0
Gateway : 10.10.70.101
TCP echo server started @ port 7
x86# telnet 10.10.70.5 7
Trying 10.10.70.5...
Connected to 10.10.70.5.
Escape character is '^]'.
hello
hello
^]
telnet>quit
x86#

Refer to https://github.com/Xilinx/embeddedsw/blob/master/lib/sw_apps/lwip_echo_server/src/README.txt for more information.

Performance measurement with lwip141 library can be done using xapp1026 - iperf application.

Known Issues/Limitations

-> No IGMP support
-> No support for 1588
-> No Support for 2500 base-x for axi 1G/2.5G IP

1. GEM

2. AXI Ethernet

-> The current lwip stack won't support 1G Non processor/Non buffered mode feature
-> No Support for Legacy 10G and 10G/25G MAC.

Current ARs

-> There is an issue with freertos support for AXI Ethernet + FIFO designs in 2017.1 and 2017.2. For details refer to AR-69578.

Change log

2017.4

019e94e lwip141: Correct tx bd ring assigments in xemacpsif
27e168d lwip141: Perform AXI DMA lookup based on base address. In multi dma design lookup based on the base address ensures that correct DMA instance is selected.
No changes in lwip echo server and freertos lwip echo server

2017.3

dd92d60 lwip: Add support for EL1 non secure mode
d602f73 lwip: Add SW workaround for TI DP83867 PHY Data integrity issues
811c4a5 lwip: Add freertos support for axiethernet fifo configuration
3221f51 lwip: Correct compiler used for A9
2133760 lwip: Update lwip compiler for A9
100857a lwip141: Make changes to fix conflicting types for xInsideISR
bdd7319 lwip141: Fix for various warnings in the AxiEthernet adapter
0200b10 lwip: Changes for CCI
e78aad2 lwip: Add workaround for RX hang in Zynq when using freertos
cab9ffe lwip141: Disable L1 prefetch for ARMv8
595b2da lwip141: Disable L1 prefetch for AXI DMA in lwip adapter
No changes in lwip echo server and freertos lwip echo server

2017.2

No changes in lwip library and lwip echo server

2017.1

c3fd75c lwip: Detect Xilinx PCS PMA with PHY addr
9fe3dc8 lwip: Add support for TI PHY DP83867 SGMII Configuration (AXI Ethernet)
317b53e lwip: Expose NO_SYS_NO_TIMERS and LWIP_TCP_KEEPALIVE to user
b15331e lwip : Fixed compilation warnings
7c56069 sw_apps, sw_services: updated tcl and mld file with latest freertos port name (lwip and freertos echo server)
749eade lwip: Add jumbo frame support for ZynqMP ethernet
33b4e72 lwip: Correct erroneous write to TI PHYCR register
417f848 lwip: Add SW workaround for TI DP83867 PHY link instability
905bab1 lwip: Update correct compiler details even when no ethernet is found

2016.4

7641174 lwip: Fix Axi Ethernet performance issue on ZynqMP
9062987 lwip: Fix compilation issue for the microblaze based designs
No changes in lwip_echo_server and freertos_lwip_echo_server

2016.3

commit: Change BD space memory attributes for Zynq to avoid corner case TX issues
commit: Dont set SLCR clock dividers when clk src is EMIO because clock is derived from EMIO
commit: Fix compilation issues in emaclite adapter for freertos823 bsp
commit: Add support for freertos in lwIP emaclite adapter
lwip echo server application (and freertos lwip echo server app)
commit: Perform a PHY reset for ZCU102 board

Related Links

http://www.wiki.xilinx.com/Standalone+Device+Drivers
http://www.wiki.xilinx.com/Standalone+Ethernet+Driver