Introduction

This page gives an overview of qspipsu driver which is available as part of the Xilinx Vivado and SDK distribution.

Source path for the driver:
https://gitenterprise.xilinx.com/embeddedsw/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/qspipsu/

Driver source code is organized into different folders. Below diagram shows the qspipsu driver source organization

qspipsu
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-- Doc - Provides the API and data structure details
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- Examples - Reference application to show how to use the driver APIs and calling sequence
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- Source - Driver source files

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Features Supported


The controller driver will be exclusive to GQSPI including API’s to be used for configuring the host controller and transmitting the data.

Commands Supported:

The following list of basic commands are supported by the Standalone driver:
  1. Read Identification
  2. Read Page
  3. Program Page
  4. Erase (Chip/Die/Bulk Erase)
  5. Read Status
  6. Lock/Unlock


Controller Features Supported:

The following features are supported in the QSPI Standalone driver.
  1. DMA access (aligned address only)
  2. IO access
  3. Control of two chip selects/bus
  4. Configurable clock
  5. Configurable bus width
  6. Byte Mirror/Stripe operations
  7. Interrupts – will be chosen and enabled internally

Example Applications:

  1. Generic register read/write operations
  2. 3 byte and 4 byte addressing
  3. Flash configurations illustrated in examples – Single, Dual Stacked, Dual Parallel

Known issues and Limitations

The standalone driver supports GenericQSPI(GQSPI) not Linear QSPI(LQSPI)


Test cases

Sample output of test cases that are taken from examples folder specified above
QSPIPSU FLASH Interrupt Example Test
Successfully ran QSPIPSU FLASH Interrupt Example Test
QSPIPSU FLASH Polling Example Test
Successfully ran QSPIPSU FLASH Polling Example Test

Performance Details

Single

Qspipsu write throughput is 1326 KBPS
Qspipsu read throughput is 28339 KBPS

Dual-Parallel

Qspipsu write throughput is 2438 KBPS
Qspipsu read throughput is 54245 KBPS

Change Log

  • 2016.3

    • Added Tap delay support
    • Added example support for LQSPI
    • Added PollData and PollTimeout Support
  • 2016.4

    • Update GQSPI PollData/PollTimeout for dualparallel configurations
  • 2017.1

    • None
  • 2017.2

    • None
  • 2017.3

    • Added support for accessing upper DDR
    • Added CCI support
  • 2017.4

    • Replaced the #ifdef COMMENTS with #if USE_FOUR_BYTE
    • Examples made compatible with u-boot and linux.
    • Resolved errors in qspipsu for ICCARM compiler
    • lqspi and poll data poll timeout example made compatible with u-boot and linux.
  • 2018.1

    • Removed unsupported 4 byte commands.
    • Added support for MT25QL02G, S25FL064L and MX66U1G45G flash parts.
    • Removed check before writing destination address to DMA MSB.
    • Added a support to toggle WP pin of the flash.
    • Added support in EL1 NS mode.
    • Enable both CS in dual parallel mode, when issuing Write enable command.
  • 2018.2

    • None

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