Below are information to complement and clarify UG1186 "Getting Started Guide".

Building ZynMP demo applications to run on RPU 1 (cortex_r5_1) with Xilinx SDK

Xilinx SDK demo applications (echo_test, matrix multiply, rpc demo) code is by default provided to run on RPU 0.
RPU 0 is also used by default for the pre-built applications provided with Petalinux BSP.
In UG1186 Appendix a general overview of the parameters to modify is provided to run in different configuration/processors.

When trying to build OpenAMP demo applications, UG1186 p.11 #1-c says that RPU-1 can be selected.
When this happen the below changes are required to the demo applications code from the Xilinx SDK:
  • Edit rsc_table.c and modify R5-1 TCM physical addresses (TCM_*_START_PA) as follow:
    replace FFE00000 by FFE90000
    replace FFE20000 by FFEB0000

  • Edit platform_info.h
    replace IPI_IRQ_VECT_ID value 65 by 66

  • Edit sys_init.c
    replace IPI_BASE_ADDR value 0xFF310000 by 0xFF320000

Building ZynMP demo applications to run on two RPU concurrently.

In UG1186 Appendix B, an exercise is provided to run two RPU concurrently.
In previous release (e.g: 2016.1) some example code is provided on the wiki to support this use case.
However with 2016.3, some race condition causes this use case to fail when built as-is.
In order to make it run, the applications running on both Cortex R5 need to be modified,
so that during initialization both RPU do not try to initialize the GIC simultaneously.

After changing BSP extra compilation flags in SDK, the libraries are not properly rebuilt:

There is a known problem where the SDK does not invoke 'make clean' for openamp and libmetal libraries.
You may need to manually delete those libraries and object files before rebuilding the BSP.