Below are information to complement and clarify UG1186 "Getting Started Guide".

Building Zynq UltraScale+ MPSoC OpenAMP applications


Additional details to support Getting Started Guide UG1186 Appendix B. exercise.
In this exercise we run Linux on the quad-core Cortex A53 APU and two concurrent echo-test demo applications on each Cortex-R5 RPUs.
The memory mapping needs to be changed for the RPUs in order to avoid having them 'walk' on each other.

The Cortex A53 Linux side defines some reserved memory entry in the DTS file (the default value in openamp.dtsi is used) that is reserved for RPU firmware in DDR.
The two Cortex R5 firmware memory partitioning can then be defined by editing the linker scripts and remoteproc carveout tables.
Here is a working example of a possible configuration provided as an archive file containing the Xilinx SDK projects for each RPUs.



You may import this archive file directly into XSDK.
Project 'et0' is for echo-test on Cortex-R5 #0
Project 'et1' is for echo-test on Cortex-R5 #1.

Both firmware are configured to use vector table, stack and heap in TCM, while their code is located in two consecutive regions in DDR.

After doing a 'clean' and rebuilding those projects with the Xilinx SDK 2016.1, you shall be able to find et0.elf and et1.elf.
Copy (tftp...) those files in your target /lib/firmware directory.

A matching example for the rpmsg_user_dev_driver_r5_1 used to communicate with Cortex-R5#1 can be downloaded below:


Note that when loading the remoteproc driver you will therefore do:
modprobe zynqmp_r5_remoteproc firmware=et0.elf firmware1=et1.elf

The files above with the additional change in the openamp.dtsi as documented in UG1186 appendix B. shall allow you getting started running two RPUs concurrently.


After changing BSP extra compilation flags in SDK, the libraries are not properly rebuilt:

There is a known problem where the SDK does not invoke 'make clean' for openamp and libmetal libraries.
You may need to manually delete those libraries and object files before rebuilding the BSP.