Table of Contents

In this demo, we shall explore the FPGA Manager driver in both U-boot and standalone on the Xilinx Zynq UltraScale+ MPSoC evaluation board, ZCU102.


BSP package was used to built the petalinux project. However users, can also use the HDF exported from Vivado to build the project.
  • See the link here for more info on how to use Petalinux to create the linux image
  • BSP can be downloaded from the Xilinx website here.

Follow the commands below to build the image:
$ petalinux-create -t project -s xilinx-ZCU102-v2017.3-final.bsp
$ petalinux-build
$ cd images/linux
$ petalinux-package --boot --fsbl zynqmp_fsbl.elf --uboot u-boot.elf --pmufw pmufw.elf --force

Build the bin file:
  • Create a BIF file (you can use the template below), and copy this to images/linux folder:

Create the bin file of the bistream (from XSCT):
$ bootgen -image boot_a53_bin_pl_all.bif -arch zynqmp -process_bitstream bin

Copy the following files onto an SD card:
  • design_1_wrapper.bit.bin
  • image.ub

This scenario uses the same boot files created in the Linux use case, but the FPGA will be loaded in U-Boot, loading the binary file in the memory and using fpga framework.

ZynqMP> fatload mmc 0 0x4000000 design_wrapper.bit.bin
reading design_wrapper.bit.bin
26510780 bytes read in 1749 ms (14.5 MiB/s)
ZynqMP> fpga load 0 0x4000000 0x19485BC // Enter the bitstream size in hex not in decimal
ZynqMP> boot


Note: Check INIT_B led is turned green once the FPGA is loaded with the new firmware


Launch SDK 2016.4 and create a new empty application.

app_project.PNG app_empty.PNG

Right click on the BSP to select Board Support Package Settings, and enable the xilfpga driver.

Configure the offset and the size of the configuration file (i.e. 0x100000 offset).
Note: Size refers to the bin file size in bytes

Create the File called xfpga_load_bitstream_example.c and copy the contents from the example file:
<SDK Install>\data\embeddedsw\lib\sw_services\xilfpga_v1_1\examples\xfpga_load_bitstream_example.c

To test the baremetal driver, user can use the XSDB, or they can create a boot image similar to the one used to test the Linux driver.

To use the XSDB, user can use the TCL script below:

targets -set -filter {name =~ "PSU"}
source ZynqMP_ZCU102_hw_platform/psu_init.tcl
dow -data design_1_wrapper.bit.bin 0x100000
# write bootloop and release A53-0 reset
mwr 0xffff0000 0x14000000
mwr 0xFD1A0104 0x380E
targets -set -filter {name =~ "Cortex-A53 #0"}
dow fpga_manager/Debug/fpga_manager.elf

Note: configuration binary file created on the Linux use case is used to load the FPGA
Note: file paths may vary, modify according to your file locations


To use the SD card option:
  • Create a fsbl application
  • Create a BIF file including the fsbl, the test application and the binary file (see example bellow)
  • bootgen -arch zynqmp -image bootgen.bif -o i BOOT.BIN -w on

//arch = zynqmp; split = false; format = BIN
  [bootloader] fsbl/Debug/fsbl.elf
  [destination_cpu = a53-0] fpga_manager/Debug/fpga_manager.elf
  [load = 0x100000, destination_cpu = a53-0]

Note: Check INIT_B led is turned green once the FPGA is loaded with the new firmware