What is device tree?

Device tree or simply called DT is a data structure that describes the hardware. This describes the hardware which is readable by an operating system like Linux so that it doesn't need to hard code details of the machine.
Linux uses the DT basically for platform identification, runtime configuration like bootargs and the device node population.

Device tree basics

Each driver or a module in the device tree is defined by the node and all its propertities are defined under that node. Based on the driver it can have child nodes or parent node.
For example a device connected by spi bus will have spi bus controller as its parent node and that device will be one of the child node of spi node. Root node is the parent for all the nodes.

Under the root node typically consists of
1) CPUs node information
2) Memory information
3) Chosen can have configuration data like the kernel parameters string and the location of an initrd image
4) Aliases
5) Nodes which define the buses information

Device tree syntax example

/ {
    compatible = "xlnx,zynqmp";
    #address-cells = <2>;
    #size-cells = <2>;
 
    cpus {
       #address-cells = <1>;
       #size-cells = <0>;
 
       cpu0: cpu@0 {
                compatible = "arm,cortexa53", "arm,armv8";
                device-type = "cpu";
                enable-method = "psci";
                operating-points-v2 = <&cpu_opp_table>;
                reg = <0x0>;
                cpu-idle-states = <&CPU_SLEEP_0>;
        };
 
        cpu1: cpu@1 {
               compatible = "arm,cortexa53", "arm,armv8";
               device-type = "cpu";
               enable-method = "psci";
               operating-points-v2 = <&cpu_opp_table>;
               reg = <0x1>;
               cpu-idle-states = <&CPU_SLEEP_0>;
        };
  };
 
  chosen {
           bootargs = "earlycon clk_ignore_unused";
  };
 
  memory {
          device-type = "memory";
          reg = <0x0 0x0 0x0 0x80000000>, <0x00000008 0x0 0x0 0x80000000>;
  };
 
  amba_apu: amba_apu@0 {
              compatible = "simple-bus";
              #address-cells = <2>;
              #size-cells = <1>;
              ranges = <0 0 0 0 0xffffffff>;
              gic: interrupt-controller@f9010000 {
                        compatible = "arm,gic-400", "arm,cortex-a15-gic";
                        #interrupt-cells = <3>;
                        reg = <0x0 0xf9010000 0x10000>,
                               0x0 0xf9020000 0x20000>,
                               0x0 0xf9040000 0x20000>,
                               0x0 0xf9060000 0x20000>,
                        interrupt-controller;
                        interrupt-parent = <&gic>;
                        interrupts =<1 9 0xf04>;
              };
  };
 
  amba: amba {
          compatible = "simple-bus";
          #address-cells = <2>;
          #size-cells = <2>;
          ranges;
          can0: can@ff060000 {
                     compatible = "xlnx,zynq-can-1.0";
                     clock-names = "can_clk", "pclk";
                     reg =<0x0 0xff060000 0x0 0x1000>;
                     interrupts = <0 23 4>;
                     interrupt-parent = <&gic>;
                     tx-fifo-depth = <0x40>;
                     rx-fifo-depth = <0x40>;
                     power-domains = <&pd_can0>;
          };
  };

Device tree properties

compatible: The top-level compatible property typically defines a compatible string for the board, and then for the SoC.
Values always given with the most-specific first, to least-specific last.
#address-cells: Property indicate how many cells (i.e 32 bits values) are needed to form the base address part in the reg property.
#size-cells: The size part of the reg property.
interrupt-controller: Is a boolean property that indicates that the current node is an interrupt controller.
#interrupt-cells: Indicates the number of cells in the interrupts property for the interrupts managed by the selected interrupt controller.
interrupt-parent: Is a phandle that points to the interrupt controller for the current node. There is generally a top-level interrupt-parent definition for the main interrupt controller.

How to add a new driver to the DTG

1. Sync the repo https://gitenterprise.xilinx.com/Linux/device-tree-xlnx
2. Create a folder with the driver name say for example axi_iic device-tree-xlnx/axi_iic/
3. Add the file data under axi_iic like device-tree-xlnx/axi_iic/data/
4. Create the files axi_iic.mdd and axi_iic.tcl under device-tree-xlnx/axi_iic/data/axi_iic.mdd axi_iic.tcl
5. The syntax for the file axi_iic.mdd is as

OPTION psf_version = 3.0;

BEGIN driver axi_iic
OPTION supported_peripherals = (axi_iic);--> the axi_iic is the IP_NAME which we get from the HDF file.
OPTION supported_os_types = (DTS);
OPTION driver_state = ACTIVE;
OPTION NAME = axi_iic;
END driver

6. The syntax for the file axi_iic.tcl where you can have the properties which need to be set based on the some condition will be defined
We use HSI APIs to update the node properities. The below we update the clock property for axi_iic calling a generic function as below
if {[string match -nocase $proctype "psu_cortexa53"] } {
update_clk_node $drv_handle "s_axi_aclk"
}

The generated node in the pl.dtsi should be as below
io_bd_iic_0: i2c@a1200000 {
#address-cells = <1>;
#size-cells = <0>;
clock-names = "s_axi_aclk";
clocks = <&misc_clk_0>;
compatible = "xlnx,xps-iic-2.00.a";
interrupt-names = "iic2intc_irpt";
interrupt-parent = <&gic>;
interrupts = <0 2 4>;
reg = <0x0 0xa1200000 0x0 0x10000>;
};

Device tree Generation

Generally for the SOCs there will be a static dts/dtsi files, but when it comes to the FPGA there can be many complicated designs which the peripheral logic(PL) IPs may vary or might be having different configurations.
For these complicated FPGA designs we require a Device tree generator(DTG) where it can generate the dts/dtsi automatically for those designs.

Build Device Tree

This how-to describes the process of compiling a device tree blob.
Device Tree Blob is a part of the Xilinx design flow described in Getting Started.

Task Dependencies (Pre-requisites)

  • Fetch Sources (Device Tree Generator sources and Linux sources)
  • Hardware Project

Tools Required


Input Files Required

  • Hardware Project directory
  • Linux source directory

Output Files Produced

  • *.dts, *.dtsi, *.dtb

Task Description

Creating a Device Tree Source (.dts/.dtsi) files (Vivado 2014.2 onwards)

Generate HDF file from hardware project

  1. Open the hardware project in Vivado.
  2. Generate Block Design
IP Integrator: Generate Block Design
# Export the hardware system to SDK:
Vivado Menu: File > Export > Export Hardware
v1.png (In <project_name>.sdk HDF file is generated)


Generate a Device Tree Source (.dts/.dtsi) files from SDK

  1. Open SDK from Vivado or open SDK via command line (xsdk -hwspec <filename>.hdf -workspace <workspace>
    Vivado Menu: File > Launch SDK

  2. v2.png
  3. The Device Tree Generator Git repository needs to be cloned from the Xilinx. See the Fetch Sources page for more information on Git.
    # Otherwise for SDK 2014.2 use this repo:
    git clone git://github.com/Xilinx/device-tree-xlnx.git
  4. Add the BSP repository in SDK (for SDK 2014.2 and later select "device-tree-xlnx" from the checked out git area):
    SDK Menu: Xilinx Tools > Repositories > New... (<bsp repo>) > OK
  5. Create a Device Tree Board Support Package (BSP):
    SDK Menu: File > New > Board Support Package > Board Support Package OS: device-tree > Finish
  6. A BSP settings window will appear. This window can also be accessed by opening the Device Tree BSP's system.mss file and clicking 'Modify this BSP's Settings'. Fill in the values as appropriate:
    • The 'bootargs' parameter specifies the arguments passed to the kernel at boot time (kernel command line). ***
    • The 'console device' parameter specifies which serial output device will be used. Select a value from the drop-down.

The .dts/.dtsi files are now located in <SDK workspace>/device_tree_bsp_0/ folder.

*** e.g. console=<tty>,<baudrate> root=/dev/ram rw ip=:::::eth0:dhcp earlyprintk
*** Some example values for <tty> are ttyPS0 when using Zynq, ttyUL0 when using the UART Lite soft ip, or ttyS0 when using the UART16550 soft ip.

Generate a Device Tree Source (.dts/.dtsi) files on command line using HSM/HSI

  1. Source Xilinx design tools
  2. Run HSM or HSI (Vivado 2014.4 onwards)
    hsm
  3. Open HDF file
    open_hw_design <design_name>.hdf
  4. Set repository path (clone done in previous step in SDK) (On Windows use this format set_repo_path {C:\device-tree-xlnx})
    set_repo_path <path to device-tree-xlnx repository>
  5. Create SW design and setup CPU (for ZynqMP psu_cortexa53_0, for Zynq ps7_cortexa9_0, for Microblaze microblaze_0)
    create_sw_design device-tree -os device_tree -proc ps7_cortexa9_0
  6. Generate DTS/DTSI files to folder my_dts where output DTS/DTSI files will be generated
    generate_target -dir my_dts

Generate a Board file Device Tree Source (.dts/.dtsi) files on command line using HSM/HSI

  1. Source Xilinx design tools
  2. Run HSM or HSI (Vivado 2014.4 onwards)
 hsi
 
  • 3. Open HDF file
  • open_hw_design <design_name>.hdf
  • 4. Set repository path (clone done in previous step in SDK) (On Windows use this format set_repo_path {C:\device-tree-xlnx})
  • set_repo_path <path to device-tree-xlnx repository>
  • 5. Create SW design and setup CPU (for ZynqMP psu_cortexa53_0, for Zynq ps7_cortexa9_0, for Microblaze microblaze_0)
  • create_sw_design device-tree -os device_tree -proc ps7_cortexa9_0
  • 6. set_property CONFIG.periph_type_overrides "{BOARD zcu102-rev1.0}" [get_os]
  • set_property CONFIG.periph_type_overrides "{BOARD zcu102-rev1.0}" [get_os]

7. Generate DTS/DTSI files to folder my_dts where output DTS/DTSI files will be generated

generate_target -dir my_dts
8. In the generated my_dts folder zcu102-rev1.0.dtsi file should be present.

Compiling a Device Tree Blob (.dtb) file from the DTS

A utility called device tree compiler (DTC) is used to compile the DTS file into a DTB file. DTC is part of the Linux source directory. linux-xlnx/scripts/dtc/ contains the source code for DTC and needs to be compiled in order to be used. One way to compile the DTC is to build the Linux tree. The DTC might also be available through your OS's package manager.

Once the DTC is available, the tool may be invoked to generate the DTB:
./scripts/dtc/dtc -I dts -O dtb -o <devicetree name>.dtb <devicetree name>.dts
DTC may also be used to convert a DTB back into a DTS:
./scripts/dtc/dtc -I dtb -O dts -o <devicetree name>.dts <devicetree name>.dtb


Alternative: For ARM only
In the Linux source directory, making the target 'dtbs' will compile all DTS files from linux-xlnx/arch/arm/boot/dts/ into DTB files.
make ARCH=arm dtbs
The compiled DTB files will be located in linux-xlnx/arch/arm/boot/dts/.
A single linux-xlnx/arch/arm/boot/dts/<devicetree name>.dts may be compiled into linux-xlnx/arch/arm/boot/dts/<devicetree name>.dtb:
make ARCH=arm <devicetree name>.dtb

Dependencies:
zynqmp-clk-ccf.dtsi has static clock node configuration, if user wants to change any of the clock information update those in system-user.dtsi.

Custom IPs:
For Custom IPs the DTG will generate the node with "compatible" property and interrupts if any connected.

--NOTE! THIS IS SECTION BELOW on SDK 2014.1 IS NOW OBSOLETE. DO NOT USE THIS.--

Creating a Device Tree Source (.dts) file for SDK 2014.1 (or earlier)

  1. Open the hardware project in XPS.
  2. Export the hardware system to SDK:
    XPS Menu: Project > Export Hardware Design to SDK... > Export & Launch SDK
    # The Device Tree Generator Git repository needs to be cloned from the Xilinx. See the [[www/Fetch Sources|Fetch Sources]] page for more information on Git. Note that there are two repos for differing SDK versions below.
    > [[code]]
    > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > git clone git://github.com/Xilinx/device-tree.git bsp/device-tree_v0_00_x//
    > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > //[[code]]//
    > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > # //Note: In order for SDK to be able to import the Device Tree Generator correctly, the file and directory hierarchy needs to look like://
    > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > //<bsp repo>/bsp/device-tree//_v0_00_x/data/device-tree_v2_1_0.mld
    > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > //<bsp repo>/bsp/device-tree//_v0_00_x/data/device-tree_v2_1_0.tcl//
    > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > > # Add the BSP repository in SDK (for SDK 2014.2 and later select "device-tree-xlnx" from the checked out git area):
    > [[code]]
     > SDK Menu: Xilinx Tools > Repositories > New... (<bsp repo>) > OK
  3. Create a Device Tree Board Support Package (BSP):
     SDK Menu: File > New > Board Support Package > Board Support Package OS: device-tree > Finish
  4. A BSP settings window will appear. This window can also be accessed by opening the Device Tree BSP's system.mss file and clicking 'Modify this BSP's Settings'. Fill in the values as appropriate:
    • The 'bootargs' parameter specifies the arguments passed to the kernel at boot time (kernel command line). ***
    • The 'console device' parameter specifies which serial output device will be used. Select a value from the drop-down.

The .dts file is now located in <SDK workspace>/<device-tree bsp name>/<processor name>/libsrc/device-tree_v0_00_x/xilinx.dts.

*** e.g. console=<tty>,<baudrate> root=/dev/ram rw ip=:::::eth0:dhcp earlyprintk
*** Some example values for <tty> are ttyPS0 when using Zynq, ttyUL0 when using the UART Lite soft ip, or ttyS0 when using the UART16550 soft ip.

In the Linux source directory, there are also some DTS files available for use in linux-xlnx/arch/<architecture>/boot/dts/.

Release Notes


Build Steps

Related Links