Introduction

This page provides details related to the standalone xxvethernet driver.
This driver supports XXVEthernet (10G/25G) and USXGMII soft blocks.
XXV Ethernet subsystem consists of a 10G/25G MAC including a 10BaseR PHY.
USXGMII Ethernet subsystem consists of a MAC similar to XXV Ethernet including a USXGMII PHY.

How to enable

-> xxvethernet driver can be found at
https://github.com/Xilinx/embeddedsw/tree/master/XilinxProcessorIPLib/drivers/xxvethernet
The driver structure is as follows:
xxvethernet
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- doc - Provides the API and data structure details
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- examples - Reference application to show how to use the driver.
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- src - Driver source files

Features supported

Controller/Driver features supported

- 10G speed on xxvethernet MAC
- 1G/2.5G/5G/10G speeds on USXGMII MAC
- PHY management and GT management.
- Support for DMA interface
- Statistics gathering
- Optional support for jumbo frames up to 16 KB

Features not supported

- Full checksum offload, VLAN, flow control and 1588 are not supported


Performance

There is no standalone performance benchmark for these 10G/25G and USXGMII MACs yet.
It is planned to be added later along with lwip support.

Test cases


xxvethernet driver has two examples demonstrating use of XXVEthernet and USXGMII MACs.
Refer to https://github.com/Xilinx/embeddedsw/blob/master/XilinxProcessorIPLib/drivers/xxvethernet/examples/readme.txt for more information

Note:
For all 10G/25G and USXGMII designs, please check the GT reference clock in your design and make sure to program the HW to provide the same.
For ex., on ZCU102, when required, the on board SI570 is programmed to supply the required GT frequency.

xxvethernet mcdma example

This is an interrupt driven loopback example demonstrating a simple send-receive test case using XXVEthernet and MCDMA.
This test loops through all 16 channels of the MCDMA connected to XXVEthernet MAC; an internal HW logic was used to direct RX packets to one of the 16 MCDMA channels using MAC address as the filter.
User applications and design need to use their own logic if they intend to direct traffic to different RX channels deterministic-ally.

Run fsbl and then the application elf.
Expected output is
--- Enter main() ---
This test may take several minutes to finish
ChanId 1, MacAddr: 0x0 0x0 0x53 0xE 0x9F 0xB0
ChanId 1 Single frame interrupt example passed
ChanId 2, MacAddr: 0x0 0xF 0x53 0xE 0x9F 0xB0
ChanId 2 Single frame interrupt example passed
ChanId 3, MacAddr: 0x0 0x10 0x53 0xE 0x9F 0xB0
ChanId 3 Single frame interrupt example passed
ChanId 4, MacAddr: 0x0 0x18 0x53 0xE 0x9F 0xB0
ChanId 4 Single frame interrupt example passed
ChanId 5, MacAddr: 0x0 0x20 0x53 0xE 0x9F 0xB0
ChanId 5 Single frame interrupt example passed
ChanId 6, MacAddr: 0x0 0x28 0x53 0xE 0x9F 0xB0
ChanId 6 Single frame interrupt example passed
ChanId 7, MacAddr: 0x0 0x30 0x53 0xE 0x9F 0xB0
ChanId 7 Single frame interrupt example passed
ChanId 8, MacAddr: 0x0 0x38 0x53 0xE 0x9F 0xB0
ChanId 8 Single frame interrupt example passed
ChanId 9, MacAddr: 0x0 0x40 0x53 0xE 0x9F 0xB0
ChanId 9 Single frame interrupt example passed
ChanId 10, MacAddr: 0x0 0x48 0x53 0xE 0x9F 0xB0
ChanId 10 Single frame interrupt example passed
ChanId 11, MacAddr: 0x0 0x50 0x53 0xE 0x9F 0xB0
ChanId 11 Single frame interrupt example passed
ChanId 12, MacAddr: 0x0 0x58 0x53 0xE 0x9F 0xB0
ChanId 12 Single frame interrupt example passed
ChanId 13, MacAddr: 0x0 0x60 0x53 0xE 0x9F 0xB0
ChanId 13 Single frame interrupt example passed
ChanId 14, MacAddr: 0x0 0x68 0x53 0xE 0x9F 0xB0
ChanId 14 Single frame interrupt example passed
ChanId 15, MacAddr: 0x0 0x70 0x53 0xE 0x9F 0xB0
ChanId 15 Single frame interrupt example passed
ChanId 16, MacAddr: 0x0 0x78 0x53 0xE 0x9F 0xB0
ChanId 16 Single frame interrupt example passed
Test passed
--- Exiting main() ---

usxgmii mcdma example

This is an interrupt driven loopback example demonstrating a simple send-receive test case using USXGMII and MCDMA.
Since USXGMII has no internal loopback, this test needs to be done with and external loopback on the HW.
The internal USXGMII phy is setup to enable auto-negotiation at 1G speed by default.
This test loops through all 16 channels of the MCDMA connected to USXGMII MAC; an internal HW logic was used to direct RX packets to one of the 16 MCDMA channels using MAC address as the filter.
User applications and design need to use their own logic if they intend to direct traffic to different RX channels deterministic-ally.

Run fsbl and then the application elf.
Expected output is
--- Enter main() ---
This test may take several minutes to finish
USXGMII setup at 1000Mbps
ChanId 1, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0x0
ChanId 1 Single frame interrupt example passed
ChanId 2, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0x10
ChanId 2 Single frame interrupt example passed
ChanId 3, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0x20
ChanId 3 Single frame interrupt example passed
ChanId 4, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0x30
ChanId 4 Single frame interrupt example passed
ChanId 5, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0x40
ChanId 5 Single frame interrupt example passed
ChanId 6, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0x50
ChanId 6 Single frame interrupt example passed
ChanId 7, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0x60
ChanId 7 Single frame interrupt example passed
ChanId 8, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0x70
ChanId 8 Single frame interrupt example passed
ChanId 9, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0x80
ChanId 9 Single frame interrupt example passed
ChanId 10, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0x90
ChanId 10 Single frame interrupt example passed
ChanId 11, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0xA0
ChanId 11 Single frame interrupt example passed
ChanId 12, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0xB0
ChanId 12 Single frame interrupt example passed
ChanId 13, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0xC0
ChanId 13 Single frame interrupt example passed
ChanId 14, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0xD0
ChanId 14 Single frame interrupt example passed
ChanId 15, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0xE0
ChanId 15 Single frame interrupt example passed
ChanId 16, Dest MacAddr: 0x0 0x0 0x53 0xE 0x9F 0xF0
ChanId 16 Single frame interrupt example passed
Test passed
--- Exiting main() ---



Known Issues/Limitations

- Full checksum offload, VLAN, flow control and 1588 are not supported

Change log

2018.2

8b3722f xxvethernet: Update tcl to add mcdma in target periph
153c16d xxvethernet: Add API to lookup by base address & IsMcdma

2018.1

0cc45f3 drivers: Add new driver for XXV Ethernet MAC
75df898 xxvethernet: Add support for USXGMII MAC
f243df8 xxvethernet: Add example for USXGMII

Related Links

http://www.wiki.xilinx.com/Baremetal+Drivers+and+Libraries
http://www.wiki.xilinx.com/AXI+MCDMA+Standalone+Driver